1. Field of the Invention
The present invention relates generally to a method of bonding solder pads of a flip-chip package, and more particularly to a method of bonding solder pads of a flip-chip package, when solder pads provided at solder bonded parts have different sizes in the flip-chip package, which is one kind of electronic package. This invention is adapted to all packages in which solder pads provided at bonded parts have different sizes, in a packaging field which requires direct bonding between a chip and a printed circuit board (PCB) or between chips, such as a system-in-package as well as the flip-chip package.
2. Description of the Related Art
In a conventional flip-chip package, solder pads of a chip and a PCB must have the same or similar size so as to increase a bonding effect at a part bonded using solder, as shown in FIGS. 1 and 2A.
Referring to FIG. 1, reference numeral 1 denotes a chip, reference numeral 2 denotes a PCB, reference numeral 4 denotes a metal wetting layer, reference numeral 5 denotes general solder having no core, reference numeral 6 denotes a passivation layer of a chip side, and reference numeral 7 denotes a solder mask.
As shown in FIG. 2B, a solder pad of the chip and a solder pad of the PCB may have different sizes. Even though the solder pads have different sizes, the sizes must be similar to each other, that is, the difference between the sizes must be 30% or less. In FIGS. 2A and 2B, reference numerals 1 and 2 denote the same components as FIG. 1. Reference numeral 8 denotes a solder pad size.
When the solder pads have different sizes, solder bonds are mechanically weak, and electric signal transmission is not possible.
Further, when the difference between the sizes of the solder pads is very large, that is, 150% or more, all of the solder melts and bonds to a larger solder pad. Thus, bonding may not be successfully performed at a position where a smaller solder pad is provided.
Even if the difference between the sizes of the solder pads is small and bonding may be realized at both solder pads, a larger amount of molten solder is bonded to the larger solder pad. Thus, the conventional bonding method has a drawback in that it is impossible to maintain the distance between the chip and the PCB, which is preset at an initial design stage, so that the solder pads must be designed to have the same size for the purpose of a solder bonding operation which is executed between the chip and the PCB or the chips in the flip-chip package.
As such, when the solder pads are designed to have one size, the following problem occurs. That is, when a product having a solder pad of a different size may be produced, the product must be discarded, thus undesirably increasing manufacturing costs thereof.
Since a multi-layer design and a multi-layer process are usually conducted on the chip side, it is possible to make solder pads at various positions, in addition to increasing the size of the solder pads. In order to cause the size and positions of the solder pads of the PCB side to correspond to those of the solder pads of the chip side, the operation of manufacturing the PCB must be executed using the multi-layer design or the multi-layer process.
If the solder pads provided at the PCB side may be small, it is unnecessary to form wiring lines in multiple layers, and it is possible to form wiring lines without contacting the solder pads even in a single layer, thus reducing manufacturing costs of the PCB.